#4977: TSL1401R-LF Visible Light 1x128-Element Photodetector Array (DIP8)

R718.20

The TSL1401R-LF linear sensor array consists × 1 array of photodiodes, associated charge amplifier circuitry, and an internal pixel data-hold function that provides simultaneous-integration start and stop times for all pixels. The pixels measure 63.5 m (H) 55.5 m (W) with 63.5-m center-to-center spacing and 8-m spacing between pixels. Operation is simplified by internal control logic that requires only a serial-input (SI) signal and a clock.

The sensor consists of 128 photodiodes arranged in a linear array. Light energy impinging on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. During the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time. The output and reset of the integrators is controlled a 128-bit shift register and reset logic. An output cycle is initiated by clocking in a logic 1 on SI. For proper operation, after meeting the minimum hold time condition, SI must go low before the next rising edge of the clock. An internal signal, called Hold, is generated from the rising edge of SI and transmitted to analog switches in the pixel circuit. This causes all 128 sampling capacitors to be disconnected from their respective integrators and starts an integrator reset period. As the SI pulse is clocked through the shift register, the charge stored on the sampling capacitors is sequentially connected to a charge-coupled output amplifier that generates a voltage on analog output AO. Simultaneously, during the first 18 clock cycles, all pixel integrators are reset, and the next integration cycle begins on the 19th clock. On the 129th clock rising edge, the SI pulse is clocked out of the shift register and the analog output AO assumes a high impedance state. Note that this 129th clock pulse is required to terminate the output of the 128th pixel, and return the internal logic to a known state. If a minimum integration time is desired, the next SI pulse may be presented after a minimum delay of tqt (pixel charge transfer time) after the 129th clock pulse. an op amp-type output that does not require an external pull-down resistor. This design allows a rail-to-rail output voltage swing. With VDD 5 V, the output is nominally 0 V for no light input, 2 V for normal white level, and 4.8 V for saturation light level. When the device is not in the output phase, in a high-impedance state.

This sensor can be used to create you own Spectroscope such as in this great tutorial: https://www.instructables.com/Arduino-Spectroscope-With-TSL1401-and-Display/ 
Here is a tutorial for the similar but smaller 1x64 model: https://arduining.com/2014/03/26/using-the-linear-sensor-array-tsl201r-with-arduino/ 
An Arduino code example/library can be found here: https://github.com/empierre/arduino/blob/master/TSL1401